Jeet Chachdiya

Jeet Chachdiya is a skilled engineer with a background in Electronics and Communications Engineering, having earned a Bachelor of Engineering from Gujarat Technological University and a Master of Technology in VLSI Design from Nirma University. Jeet has completed an internship at Tech Mahindra Cerium Pvt Ltd as a Design Verification Intern, where expertise in digital electronics, Linux, Verilog, and System Verilog was developed. Currently, Jeet is working as an Analog Validation Intern at Intel Corporation, focusing on silicon analog validation for PCIe, gaining valuable hands-on experience in silicon validation and characterization.