Joel Japlit is a task and procedure-oriented Senior PCB Layout Designer with over 30 years of experience in the field. Formerly a Hardware Engineer at Intel Corporation, they currently work as a Senior Hardware Engineer and Design Review Engineer. Joel has held various roles, including Senior Printed Circuit Board Designer at multiple companies, and continues to contribute to the engineering community through ongoing positions with notable firms. Joel's educational background includes studies at the Masters Institute of Technology in Computer and Information Sciences and Support Services.
Location
Sacramento, United States
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