John Donohue

Senior Defect Reduction Yield Engineer at Intel

John Donohue is a seasoned Senior Defect Reduction Yield Engineer at Intel Corporation since October 2005, focusing on the inline defect performance of metal/via interconnect layers within the 14nm process, including root-cause analysis and defect improvement coordination. Previously, John held positions as a Back End Integration shift engineer and a Defect Metrology shift engineer, demonstrating expertise in yield issue management and process maintenance. Prior to joining Intel, John completed a postgraduate industrial placement at Boston Scientific, contributing to validation testing for innovative medical applications. Educational credentials include an M.Sc. in Optoelectronics from Dublin City University and a B.Sc. in Experimental Physics from the University of Galway.

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