Ken Jin Tan is an electronics engineering professional specializing in PDK development and EDA design automation. They possess over 10 years of experience across various engineering disciplines, with a focus on physical design, verification, and flow development in advanced nanometer technologies. Ken has significant expertise in layout verification methodologies and has held project and technical leadership roles, contributing to high-profile projects at companies such as Intel and Altera. Academically, they hold a Bachelor of Engineering in Electronics Engineering and a Master of Science in Electronic System Design Engineering, with fluency in English, Malay, and Mandarin.
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