Kiran Vemula

Kiran Vemula, MS, MBA, has extensive experience in semiconductor engineering, particularly at Intel Corporation since May 1998, where Kiran serves as SoC Engineering Manager, overseeing the physical implementation of Xeon Uncore sections, including implementation from RTL to layout cleanup, and managing a high-performing team. Prior roles included Senior Component Design Engineer positions focused on Itanium Processor and I/O Processors, where Kiran owned key architecture and RTL design tasks for various units and contributed to validation processes. Kiran started a career as a Design Engineer at Digital Semiconductors in 1997 and holds an MBA from Babson College, an MS in Electrical Engineering from Arizona State University, and a B.Tech in Electronics & Instrumentation from Kakatiya University.