Manish Patla

Manish Patla is currently an EDA Intern at Intel Corporation, contributing to the Frontend Domain for EDA Tool Flow and Methodology Development in the CADD Team. Previously, Manish participated in the RISCV CTB Verification Hackathon organized by RISC-V International, securing Second Prize among over 740 participants worldwide. Educational qualifications include a Master of Technology (MTech) in Communication Engineering and Networks from the National Institute of Technology Karnataka, with a GPA of 8.97, a Bachelor of Technology (BTech) in Electronics and Communications Engineering from PES University, achieving a CGPA of 8.35, and earlier studies in Pre-University (PCME) and SSLC with notable academic performance.