ML

Michael Lai

SoC Design Engineer - Chip Lead

Michael Lai is a seasoned SOC Design Engineer with over 19 years of experience in the semiconductor industry, specializing in high-speed SERDES protocols and integrated transceivers for FPGA products. They have held key positions at companies such as Intel Corporation and Xilinx Inc., where responsibilities included leading design and validation engineering efforts, as well as collaborating with cross-functional teams to address customer needs. Michael earned both a Bachelor's and a Master's degree in Electrical and Computer Engineering from the University of California, Davis. Their expertise encompasses ASIC and FPGA design flow, silicon validation, and power analysis.

Location

San Jose, United States

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