Nithin Sankar K

Nithin Sankar K is a Senior Physical Design Timing Engineer at Intel Corporation, where they focus on timing constraints development, functional and test protocols planning, and timing sign-off for SoCs. Nithin previously worked as a Project Research Assistant at the Indian Institute of Technology, Bombay, engaging in RF transceiver design for biomedical applications. They also served as a Company Coordinator for the institute's placement team, managing recruitment efforts for 1,600 students across multiple departments. Earlier in their career, Nithin was an Associate System Engineer at IBM India, specializing in 4G LTE testing and system implementations. Nithin holds a Master of Technology in Electrical and Electronics Engineering from IIT Bombay and a Bachelor of Technology in Electrical, Electronics and Communications Engineering from the College of Engineering, Trivandrum.