Paul Liu

Paul Liu is a Senior Electrical Engineer at ASTRI, where they focus on RTL design, developing and maintaining DV environments, and debugging test cases and FPGAs. Previously, they worked as a Design Engineer at Broadcom from 2006 to 2014, specializing in design verification and RTL design. Paul also completed a Master of Science in Electrical and Electronics Engineering at San Jose State University and earned a Bachelor of Science in Electrical Engineering from the University of California, Berkeley. In addition, they gained experience as an intern at both National Semiconductor and Intel Corporation.