Raghuraman Ganesan

Raghuraman Ganesan is a Technical Lead at Intel Corporation, specializing in AI accelerators and Xeon power/performance/binsplit modeling, leveraging over 24 years of experience in CPU design. They have a proven track record in product development, optimization, and performance analysis, particularly for Intel E-core Xeon servers and Last Level Cache designs. Prior to their current role, Raghuraman served as a Senior Staff Engineer at Intel, where they led various projects and played a crucial role in power convergence initiatives and SRAM IP design. Raghuraman holds a Bachelor of Science in Physics from Loyola College, a Bachelor of Technology in Instrumentation Engineering from Madras Institute of Technology, and a Master of Science in Electrical Engineering from the University of Toledo.