Rajender Jindal

Rajender Jindal is a seasoned professional in RTL design verification, validation, and BFM development with expertise in various methodologies including OVM/UVM and Vera. Rajender has worked at notable companies such as Intel Corporation, where they serve as SOC Verification Lead, overseeing testbench strategizing and team management. Their previous roles include Principal Engineer at Western Digital, contributing to NVME validation for storage ASICs, and lead verification engineer at Cerium Systems/Sicon, where they played a key role in attracting major clients. Rajender holds a Bachelor of Engineering degree in Electrical, Electronic, and Communications Engineering from the National Institute of Technology Karnataka.