Ramesh Nair

Sr. EDA Tools Hardware Engineer/Design Methodology Engineering Manager

Ramesh Nair is a Senior Hardware Design Methodology Engineer at Intel Corporation, where they lead a team responsible for sign-off tools, flows, and methodology essential for performance verification and optimization. With a strong background in Electronic Design Automation and Static Timing Analysis, Ramesh previously served as a Design Automation Engineer at Intel from 2014 to 2021. As an active member of IEEE, they hold the position of Vice President of Communications & Public Awareness for IEEE-USA and have contributed significantly to various IEEE committees, including serving on the IEEE Awards Board and as Chair of the 2019 IEEE Rising Stars Conference. Ramesh earned a Master’s Degree in Computer Engineering from the University of Cincinnati and a Bachelor's Degree in Electronics and Communication Engineering from Amrita Vishwa Vidyapeetham.

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Folsom, United States

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