Reyad M. is a Sr. Design Engineer at Intel Corporation, where they focus on physical design implementation with expertise in chip floorplanning, power planning, and timing optimization. They previously worked as a Design Engineer III at Qualcomm and spent 18 years at Toshiba America Electronic Components, INC as a Staff Design Engineer. Reyad has also held a senior position at LSI Logic Corporation, where they coordinated technical aspects for customer ASIC development. They earned a Bachelor’s degree in Electrical Engineering with a focus on VLSI and Computer Hardware, along with a minor in Mathematics from the University of Kentucky.
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