Satish Natla

Satish Natla is a Principal Engineer at Intel Corporation with over 10 years of experience in pre-silicon verification as a validation architect and tech lead. They have extensive knowledge in server memory technologies, including DDR3, DDR4, and 3D Xpoint memory controllers, and have led teams in creating validation methodologies and verification planning. Satish contributed significantly to various projects, including the development of end-to-end checker frameworks and the migration to UVM for testbench environments. They hold a Master's degree in Electrical Engineering from The University of Kansas and a Bachelor's degree in Electronics from Jawaharlal Nehru Technological University.