SJ

Seongtae Jeong

Director, Technology Definition and Modeling, Design Enablement

Seongtae Jeong is an Intel Fellow and currently serves as the Director of Technology Definition and Modeling in Design Enablement at Intel Corporation. They previously held the position of Principal Engineer in Resolution Enhancement Technology from 2000 to 2019 and were a Staff Scientist at Lawrence Berkeley National Laboratory from 1998 to 2000, focusing on EUV lithography mask blank defect inspection. Seongtae earned a PhD in Physics from the University of California, Berkeley, and a Bachelor's in Physics from Seoul National University. They conducted research as a Graduate Student Researcher at UC Berkeley from 1992 to 1997.

Location

Portland, United States

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