Shashank T.

Shashank T. is a Physical Design Engineer at Intel Corporation, where they focus on block level design implementation and clock network design for microprocessors. They have experience managing the interface between full chip and block-level designs across multiple technology nodes and have worked on timing analysis and standard cell library characterization. In the past, Shashank engaged in internships at Aedifico Tech Pvt. Ltd. and Bharat Electronics Limited, and served as a Teaching Assistant while pursuing graduate studies at MNIT Jaipur. Shashank's passion for learning and adaptability drive their interest in contributing to a challenge-driven environment within the semiconductor industry.