Sheetal Kulkarni is a Silicon Validation Engineer with extensive experience in the semiconductor industry. They previously worked as a Staff Engineer and Senior Manager at Samsung Semiconductor, where they designed and developed test cases for embedded memory products, leading a team focused on memory product compatibility and performance testing. Currently, Sheetal serves as an Engineering Manager at Intel Corporation, overseeing the development and execution of post-silicon functionality test plans for Intel Xeon Processors. They hold a Master of Technology in Communication Systems from R. V. College of Engineering and a Bachelor of Engineering in Electronics and Communication from Basaveshwar Engineering College.
Location
Bengaluru, India
This person is not in the org chart
This person is not in any offices