Sudheer Padala

Sudheer Padala is a Staff Analog Design Engineer at Intel Corporation, specializing in integrated circuit design with over 10 years of experience in analog and mixed-signal circuit design. They previously served as a Senior Analog Design Engineer at Intel and have held roles at companies such as MELEXIS, IDT, and Dell, contributing to various projects from LIDAR sensor ICs to RF synthesizers. Sudheer earned a Master's degree in Mathematics from BITS Pilani and has also worked as a Graduate Research Assistant, focusing on negative bias temperature instability in CMOS circuits. They began their career with internships at Sabre Travel Technologies and Ridgetop Group, further developing their expertise in the field.