Varun Sabhlok is a Senior SOC Design Engineer at Intel with over 8 years of experience in the semiconductor industry, specializing in physical design, including analog layout and structural design. They previously held the role of Engineering Manager, leading a team of 19 engineers on high-speed SerDes IP projects at Intel. Varun has successfully delivered 20+ key high-intensity tape-outs and received multiple recognitions for their contributions to team success. They earned a Master’s degree in Electrical Engineering and a Bachelor’s degree in Computer and Electrical Engineering from the State University of New York at Buffalo.
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