Xiong Li is a senior level wafer process and advanced packaging engineering professional with extensive experience in process development and foundry outsourcing. They served as a department manager at Intel Corporation, overseeing Fab 9's advanced packaging mass production line and leading a team of approximately 250 people. Previously, Xiong held various roles at Jireh Semiconductor, including director and process integration manager, driving innovations in mass production and process R&D. Their earlier experience includes working as an integration staff engineer and photo process engineer at TSMC, where they were involved in process integration and product line setup. Xiong earned a master's degree in electrical and electronics engineering from Huazhong University of Science and Technology.
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