Arild Velure

Arild Velure is a Principal FPGA developer at Inventas, specializing in the design, implementation, verification, and testing of advanced FPGA and ASIC designs for space applications and high energy physics. They previously served as a Fellow at CERN, where they focused on high-speed FPGA readout boards and continuous integration for FPGA design. Arild also held a PhD from the University of Bergen, where they led RTL verification on mixed signal ASICs, and has experience in hardware development for medical devices. They continue to contribute to electronic design at Velure Design Bureau while leading projects at Inventas.