Jon M.

Jon M. is a seasoned hardware engineer with extensive experience in silicon architecture and design, particularly for processors optimized for machine learning. Currently at Jump Trading LLC since October 2020, Jon previously held positions at Graphcore and XMOS, where responsibilities included architecture and infrastructure development for pioneering processors. Prior roles include Senior Silicon Engineer at NVIDIA, contributing to low-power SoC architecture for the Tegra 4i chip, and earlier experience at Icera Semiconductor Inc., focusing on SoC design and verification. Jon began a career in engineering following an MEng in Electronic & Electrical Engineering from the University of Birmingham and has engaged in summer internships at Micron Technology and BT Research Labs, enhancing the development of contextually aware computing and memory projects.