Tim Chiew

Tim Chiew is a seasoned engineering professional with extensive experience in IP and system design, currently serving as the Director of IP & System Design Engineering at Lattice Semiconductor since April 2024. Prior to this role, Tim held the position of Director of FPGA IP Design Engineering within Intel Corporation's Programmable Solution Group, overseeing an FPGA IP Design Organization for both Wireless Communication and Highspeed Interconnect segments. Tim's career includes significant leadership roles at AlteraFPGA, where responsibilities ranged from managing ethernet and PTP 1588 IP development to leading teams in the creation of advanced FPGA solutions. Tim began a career at Intel Corporation in 2004, transitioning from roles in silicon validation to emulation, influencing the successful launch of several high-impact IP products. Tim Chiew earned a degree from Universiti Sains Malaysia.