Hari Ramineni

Hari Ramineni is currently a Senior Staff ASIC & FPGA Design Engineer at Lockheed Martin, where they have been contributing since 2023. They previously held various roles in design and verification, including a position as FPGA Design Verification Consultant at Amazon and Staff Design Verification Engineer at Groq. Hari's earlier experience includes positions at Intel and Euclid, where they focused on component design and verification engineering. They earned a Bachelor of Technology from Jawaharlal Nehru Technological University and a Master of Science from The University of Texas at San Antonio.