Jeevan C N is a result-oriented Technical Lead with over 9 years of experience specializing in server validation, post-silicon validation, and project management. They have a proven track record in RAS, power and performance, server architecture, and debugging, particularly with Intel platforms. Previously, they held engineering positions at TUV Rheinland India and served as a Technical Lead at L&T Technology Services, where they managed complex projects and mentored teams. Jeevan holds a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Visvesvaraya Technological University and is currently leading validation efforts on next-gen server platforms at L&T Technology Services.
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