Yogitha SV

Yogitha SV is a Platform Emulation Engineer with expertise in pre-silicon validation and experience utilizing Palladium and Veloce platforms. They possess knowledge of USB, PCIe, and AXI protocols and are skilled in writing RTL models using Verilog HDL, as well as developing test benches with SystemVerilog and UVM. Yogitha's professional journey includes roles at L&T Technology Services as an Engineer and Associate Engineer, following a background as a Student at Maven Silicon. They earned a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Srinivas Institute of Technology in 2019.