Bernard Bourgin

Bernard Bourgin is a seasoned engineering professional with extensive experience in ASIC methodology and physical design. Since June 2013, Bernard has served as a Senior Principal Engineer in ASIC Methodology at Marvell Semiconductor, overseeing the development and deployment of the Marvell One Design Platform and responsible for CAD infrastructure specification and tool flows integration. Prior to this role, Bernard worked at STMicroelectronics from 1999 to 2013, holding various positions including ASIC Implementation Manager, where four chips were successfully taped out, and Design Solutions Manager, leading a project to automate ASIC implementation flows. Bernard's career began in 1989 at STMicroelectronics, progressing through roles that focused on design methodology and support, contributing significantly to the improvement of design processes and project schedules. Educational credentials include a Graduate Degree in Microelectronics from Claude Bernard University and a Master of Engineering in Computer Sciences from INSA Lyon.