Deekshith Krishnegowda

Deekshith Krishnegowda is an experienced RTL Design Engineer currently working at Marvell Technology since July 2019, focusing on the Alaska series high-speed Ethernet PHY for line cards and Active Electrical Cable, with successful tape outs for 400G and 800G projects. Previously, Deekshith held a position as a Digital Design Engineer at Toshiba Memory America, Inc. in 2018, contributing to the enterprise SSD R&D team by developing a parameterized design library for a linked-list controller and round robin arbiter. Early in the career at Maven Silicon in 2017, Deekshith worked on RTL design and verification, specifically on IEEE 8b/10b encoding and decoding, AHB and APB protocols, designing interfaces, and implementing assertion checkers. Deekshith holds a Master's degree in Electrical and Electronics Engineering from San José State University and a Bachelor's degree in Electrical, Electronics, and Communications Engineering from Dayananda Sagar Institutions.