Fei Lu is a Principal Engineer at Marvell Semiconductor, where they specialize in Serdes design since 2023. Previously, Fei held roles as a Senior Analog Design Engineer and Staff Engineer at Marvell Technology from 2017 to 2020. They gained valuable experience as a Research and Teaching Assistant at UC Riverside from 2012 to 2015, contributing to projects involving ESD and analog circuit design. Fei also interned at Morfis Semiconductor, Inc., where they focused on power amplifier design and ESD protection. Fei's education includes a degree from the University of California, Riverside, and they are currently enrolled at Southeast University and Tongzhou High School.
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