Henry Wang

Henry Wang is a Principal Timing Engineer at Marvell, specializing in ASIC design and verification with over 20 years of experience in large-scale SoC chip integration. They previously worked at AMD as a MTS ASIC/Layout Design Engineer and later as an SMTS Silicon Design Engineer, contributing to the development of high-profile SoC chips for major clients like Microsoft and Sony. Henry has also served as a Staff ASIC Design Engineer at NETINT Technologies Inc., focusing on mass flash storage controller development. They are pursuing a Bachelor's Degree in Electrical and Electronics Engineering from Northeastern University.