Janeth Cezar

Senior IC Layout Engineer

Janeth Cezar is a Senior IC Layout Engineer at Marvell, where they have been contributing since 2025. Previously, Janeth worked as an IC Layout Engineer at Analog Devices from 2020 to 2025 and held intern positions at Excelitas Technologies Corp. and PLDT LIPA in 2017 and 2018, respectively. Janeth earned a Bachelor of Science in Electronics Engineering from the Polytechnic University of the Philippines Sto. Tomas Batangas, graduating in 2019.

Location

Singapore

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