Jeevith Paul is a seasoned engineer currently working as a Sr. Staff Engineer in DFT at Marvell Technology. They previously served as a Sr. DFT lead at Qualcomm and held various DFT engineering roles at companies including Tessolve, Wafer Space, and Cypress Semiconductor Corporation. Jeevith's experience encompasses scan insertion, ATPG generation, JTAG verification, and post-silicon debug. They hold a Bachelor's degree in Electronics and Communication from BNMIT and a Master's degree in VLSI and Embedded Systems from New Horizon College of Engineering, where they graduated with first class distinction.
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