Jeff Hardesty

Jeff Hardesty is a highly experienced engineer with a strong background in semiconductor design and architecture, currently serving as a Principal Engineer at Marvell Semiconductor since March 2019. Prior experience includes roles as Principal Engineer at Rambus and Senior Staff Engineer/Architect at Qualcomm, where involvement in SOC architecture and collaboration with various teams led to innovative solutions in complex projects. Jeff has also held significant positions at Open-Silicon, Qualcomm (as an independent contractor), AMCC, Nortel, and Motorola Semiconductor, demonstrating expertise in ASIC design, verification, and integration across multiple technologies and protocols. Jeff holds a Bachelor of Science in Electrical Engineering from Virginia Tech and has undergone Dale Carnegie Training.