Phoebe Luo

Phoebe Luo is a Design Verification Engineer at Marvell Technology, where experience includes a previous role as an ASIC Verification Intern. Prior to this, Phoebe worked as an FPGA Hardware Designer at Molex and completed a SoC Verification Internship at NXP Semiconductors. Phoebe’s background also encompasses a SoC Design Internship at Anyka Technologies Corp.