Rohit Dhar is a seasoned professional in the semiconductor industry with extensive experience in engineering management and verification. Currently serving as a Senior Engineering Manager at Marvell Semiconductor since June 2018, Rohit has previously held the position of Principal Engineer at QLogic from December 2007 to June 2018, where responsibilities included the verification of PCIe Core and development of verification environments. Prior roles include working as an ASIC Engineer at eInfochips, focusing on multimedia IP design and SATA Verification IP development, and as an engineer at HKS Systems, contributing to hardware development for DSP core projects. Rohit holds a PG Diploma in VLSI Design from CDAC - ACTS and a Bachelor of Engineering in Electronics from Nagpur University.
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