Sujit Singh is currently a Staff Analog Layout Engineer at Marvell Technology, where they specialize in analog and digital signal layout design. Previously, they served as an Analog Layout Design Engineer at Qualcomm from 2020 to 2022 and at Sankalp Semiconductor Inc from 2017 to 2020. Sujit is proficient in various technologies and tools, including Cadence Virtuoso and TSMC, and has a robust background in hierarchical design and physical verification checks at the chip level. Sujit completed high school with a focus on Physics, Chemistry, and Mathematics at Sree Ayyappa Public School from 2010 to 2012.
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