Greg Chaney is an FPGA Design Engineer at Matrix Research, Inc., where they have been contributing since 2023. Previously, they held roles as a Senior Electrical and Software Engineer at Johnson & Johnson from 2022 to 2023, and as a Sr. Electrical Engineer at Sierra Nevada Corporation from 2018 to 2022. Their earlier experience includes being an Electrical Engineer at Aviation Ground Equipment Corporation from 2013 to 2018, and internships at Riverside Research, D'Angelo Technologies, and Tec^Edge. Greg earned a Bachelor of Science in Biomedical Engineering and two Master of Science degrees in Electrical Engineering from Wright State University between 2007 and 2013.
This person is not in the org chart
This person is not in any teams
This person is not in any offices