Judit Carreras is an experienced professional in the field of semiconductor design and verification, currently serving as Design Verification Manager and ASIC Design Senior Group Lead at MaxLinear since April 2017. Carreras has a robust background, having previously worked at Marvell Semiconductor as a Senior Staff Engineer and Staff Engineer from August 2010 to March 2017, as well as holding the position of Technical Manager at DS2 from August 2000 to August 2010. Educationally, Carreras earned a DEA in Mathematics and a degree in Mathematics from Universitat Politècnica de Catalunya, where also served as a teacher in the School of Industrial Engineers from September 1997 to June 2000.
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