Kar Foo Chong

Kar Foo Chong is the Principal FPGA Prototyping Engineer at MaxLinear, specializing in FPGA prototyping for Ethernet switches and network processors. They previously held positions at Intel Corporation as a Design Automation Engineer, and at Avago Technologies, where they were a Senior FPGA Design Engineer responsible for system architecture definition for digital filter FPGA kits and proximity sensor ASIC implementation. From 2010 to 2015, they served as a Senior Staff System Validation Engineer at Altera, focusing on device architecture validation and FPGA implementation. Kar was also a Senior FPGA Design Engineer at the Institute of Microelectronics and a Senior Expert FPGA Developer at Rohde & Schwarz, where they designed solutions for DSP-intensive algorithms. Kar is currently pursuing a Master's Degree in Electrical and Electronics Engineering at Universiti Sains Malaysia, having completed a Bachelor's Degree at the same institution in 2013.