Vivith Shetty

Vivith Shetty is a Staff DFT Engineer at MaxLinear Singapore, where they work on scan insertion, ATPG pattern generation, and DFT coverage improvement. Vivith previously held positions as a SoC Design Engineer at Intel Corporation and as a Senior Engineer II at eInfochips, focusing on ATPG pattern simulation and post-silicon processes. Earlier in their career, they were an Engineer at Tessolve Services Pvt. Ltd., specializing in post-silicon and DFT ATPG. Vivith completed a Bachelor of Engineering in Electronics and Communication Engineering from M.I.T.E in 2014.