Zaid Jerbaoui is a skilled engineer specializing in digital IC design verification, currently working as a Senior Digital IC Design Verification Engineer at MaxLinear since July 2025. Previously, Zaid held positions as a Verification Engineer at Oxford Global Resources, a Digital IC Design Verification Engineer at indie Semiconductor, and a Design Verification Engineer at Sondrel Ltd. Zaid also completed an internship as a Verification Intern at Sondrel Ltd and served as an Assistant ingénieur d'études at Intellcap, contributing to an agricultural drone project. Zaid's early experience includes working as a Technicien en Automatisme at ONEE-Branche Eau and a technical intern at ANRT. Zaid holds an engineering degree in Aeronautical Engineering from Ecole Nationale des Sciences Appliquées de Berrechid and a DUT in Electrical Engineering and Industrial Computing from Ecole superieure de technologie EST Salé.
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