Ajeet Kumar is a Staff Engineer at MediaTek with extensive experience in the VLSI industry. Previously, Ajeet held senior engineering roles at TATA Consultancy Services, Cadence Design Systems, and ams AG, focusing on areas such as FPGA and ASIC Design, as well as Digital Design Enablement. Ajeet's expertise includes Logic and Physical Synthesis, STA, Low-power Design, and System on Chip (SoC) Implementation, supported by a postgraduate diploma in VLSI Design from C-DAC, NOIDA and a Bachelor's degree in Electrical and Electronics Engineering from the University of Pune.
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