Amine TAGANT is a skilled Radio Frequency IC Design Engineer at MediaTek since May 2022, with prior experience as an RF Engineer Intern at Qualcomm, where contributions included the design of a 4th order N-fractional PLL. Proficient in design and simulation using Virtuoso Cadence software, Amine has worked on projects involving a VCO based on a ring oscillator, PLL transient simulations, and phase noise analysis. Previous experience includes an engineering internship at IMS Laboratory, focused on the research and design of a Power Limiter in CMOS technology, and a role as a receptionist at Hôtel de la Boëtie, demonstrating strong customer service skills. Amine holds a Master of Science in Electronics from ENSEIRB-MATMECA, an Affiliate Programme from UCL, and a Bachelor of Science from Université de Bordeaux.
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