Atul Jadhav

Atul Jadhav is a Senior Physical Design Engineer at MediaTek, where they apply their extensive knowledge of ASIC physical design flow, from specifications to GDSII. Having previously worked at Synapse Design Inc. and Pozibility Technologies Pvt Ltd, Atul gained valuable experience in timing closure, DRC, LVS, and reliability issues such as latch-up and cross-talk. Their educational background includes a Bachelor of Engineering in Electronics and Communications Engineering from Rural Engineering College, BHALKI. Atul is currently seeking opportunities in high-technology organizations that promote professional growth and innovation.