Hari Narayanan

Hari Narayanan is a Design Verification Engineer at MediaTek, beginning in January 2023, with prior experience as a Design Verification Intern at the same company in May 2022. In the current role at MediaTek USA in Austin, Hari focuses on developing testbench and test cases for the functional verification of SESV7 IP, which facilitates power supply scanning for debug purposes. Previous experiences include an internship at Silicon Labs Pvt. Ltd. from December 2020 to May 2021, where responsibilities included the design and verification of electronic circuits, as well as hands-on implementation of those circuits. Hari also interned at ISRO - Indian Space Research Organization, where responsibilities involved digital modeling of LVDT signal conditioners using Verilog, KiCad, and Simulink, including the design of a digital sine wave excitation and the implementation of Booth's division algorithm in Verilog HDL. Academic qualifications include a Master’s degree in Electrical Engineering from Arizona State University and a Bachelor’s degree in Electrical, Electronics and Communications Engineering from Amrita Vishwa Vidyapeetham.