jagadeesh kolisetti

Jagadeesh Kolisetti is a Staff Engineer at MediaTek, specializing in static timing analysis (STA), timing closure, and physical design with over 7 years of experience in VLSI. They have worked on cutting-edge technologies such as 2nm to 7nm semiconductor process nodes, applying their expertise in CPUs, GPUs, mobile SoCs, IoT, and automotive chipsets. Jagadeesh previously held roles as a physical design and STA engineer at Centaurs Semiconductors and Semicon Technolabs, and they advanced to a Senior Engineer position at MediaTek before their current role. They earned a Bachelor's degree in Electronics and Communications Engineering from Chalapathi Institute of Technology and a Diploma in the same field from CR Polytechnic College.