Jeremy Yang is a skilled engineer specializing in System on Chip (SoC) design, currently serving as a Senior SoC Design Engineer at MediaTek since January 2022, where responsibilities include infra partition design and integration. Prior to this role, Jeremy worked at 創意電子 from August 2018 to December 2021 as a SoC Design Engineer, gaining experience in Bus fabric, SMMU, Peripheral IP configuration, verification, and integration, while also overseeing whole chip Lint, CDC, and SDC checks. Jeremy holds a Master of Science in Electrical and Control Engineering from National Chiao Tung University and a Bachelor of Science in Electrical Engineering from National Chi Nan University.
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