王穎翔

穎翔 王 is a seasoned analog IC design professional with over nine years of experience in display driver IC design and more than three years in high-speed PHY design on SoC. Currently serving as a senior manager at 聯發科技 since 2022, they previously held roles as a senior engineer at 尼克森微電子 and as a deputy manager at 聯詠科技股份有限公司. 穎翔 has also contributed to large display driver IC development and has experience in AC-DC power IC design, while actively participating in training for analog design. They earned a master's degree in Electrical, Electronic, and Communications Engineering Technology from 中原大學 in 2008.