Qiulin Luo

Qiulin Luo is a digital verification engineer currently working at MediaTek. They recently graduated with a Master's degree in Electrical Engineering from the National University of Singapore, where they achieved a GPA of 4.88. Qiulin has gained hands-on experience through various internships, including roles at GAC R&D, Analog Devices, and the Guangdong Greater Bay Area Institute of Integrated Circuit and System, focusing on circuit design, digital verification, and intelligent driving algorithms. Additionally, they possess technical proficiency in tools such as Cadence Virtuoso, Sentaurus, and programming languages like Python and Verilog.