Sanjay Bagali

Sanjay Bagali is a Technical Manager at MediaTek, bringing extensive expertise in physical design, verification, and low power design. Previously, Sanjay held roles as an ASIC Design Engineer at Open-Silicon Research and a Physical Design Engineer at MediaTek Singapore. With a background that includes a Graduate Internship at Intel, Sanjay's skill set encompasses tools such as ICC and SOC Encounter, as well as proficiency in scripting languages like TCL and PERL. Sanjay earned an M.Tech in VLSI & Embedded Systems from RV College of Engineering and a B.E. in Electronics & Communication from SDM College of Engineering & Technology.